Traffic warning system or so called TDDY(Traffic Data Display ) is a vehicle-mounted, receive-only traffic warning system designed by Dubravko Gacina. System may be used to minimize the risk of vehicle like like public buses, emergency response vehicles, cabs, delivery vehicles accidents. An ATmega128 microcontroller and a matrix of 512 bi-color LEDs organized as a map of the Los Angeles freeways comprise the system.

Collisions between emergency vehicles and other vehicles are common events. Many of these collisions occur at inter-sections. Public vehicles approaching at 90 degrees to the direction of travel of emergency vehicles are very difficult to see. Sensors mounted on the vehicle could alert emergency vehicle drivers of approaching cross traffic. In such a scenario, sensors sends information to some sort of dispatching center which process incoming data and, in return, sends data to interested parties in form of positional information to traffic warning devices mounted in vehicles.

This design presents an early implementation of traffic warning device. Conventionally, it uses server software hosted on PC and pager which serves as client to display position of vehicles on city map. You can download project files here .

This project was developed by Flavio Ribeiro as at the University of São Paulo’s Polytechnic School of Engineering. It uses ARM9 (AT91RM9200) microcontroller running at 190MHz speed.

Board specifications are:

• 180 MHz ARM9 processor (Atmel AT91RM9200);

• 3 MPixel Micron MT9T001 CMOS sensor;

• Altera Cyclone FPGA with 6000 LEs;

• 2×32 MBytes of SDRAM (32MB for the ARM9 and 32MB for the FPGA)

• 16 Mbits of serial flash

• 1 10/100 Intel Ethernet interface

• 1 high speed USB 2.0 interface

• 1 SPI interface

• 1 serial (RS-232) interface

Board runs ARM Debian Linux from USB key-drive. CMOS sensor is accessed by FPGA. It reads image frames that can be processed further by FPGA or ARM9 microcontroller. It seems quite challenging project to play with.

This is really interesting FPGA project because it has 24 logic input channels that is sampled at high rate while stream data is sent to PC via high speed USB 2.0 port – what means hundreds of megabytes.

Logic analyzer is built under Altera Cyclone II FPGA (EP2C5T144C7N) and a NET2272 USB controller from NetChip. Board is USB powered with necessary voltage converters on board.

The board has three connectors :

• 10-pin connector for JTAG configuration of the FPGA. Its pinout is ready to be used with Altera Byteblaster cable.

• 10-pin connector is for connecting a serial FPGA configuration device;

• 26-pin connector is for connecting the probes.

Author provides full schematics of logic analyzer, source and a quickly written Linux driver to get board running.

This is stand alone mp3 player built from scratch. The Idea was to build MP3 player by using components available world wide.

MP3 player reads FAT32 file system from IDE drive up to 128Gigabytes. It can have from 4 to 32 Megabytes SIMM ram, Information is displayed on large LCD, music reaches the ear through 24-bit DAC. Firmware is open-source and is ready to be flashed. You can build it by yourself as all information is available or you can order fully assembled and tested board just for 150$.

Jean P. Nicolle has a nice site devoted to FPGA. Since 1997 he collected a bunch information about FPGA and related projects. One of his newest projects is CNC mill where steppers are controlled by FPGA.

When designing milling system, he encountered speed and acceleration of milling head, so the positioning would be as precise as possible. Stepper motor controller is interfaced to PC via FPGA Saxo board which converts USB-2 to parallel. The complete code will be available from KNJN.com soon.